The Preferable Bank Number for Multibanked-Caches

Since the gap between main memory access time and processor
cycle time is continuously increasing, processor performance dramatically
depends on the behavior of caches, many researchers worldwide have come
forward to present performance of the current caches to decrease this gap.
One of the used approaches is multi-banked caches, in which the caches is
divided into independent banks that can support simultaneous accesses, two
loads or two stores in parallel, rather than treat the cache as a single
monolithic block acts accesses sequentially. Some processors use banking
(AMD Opteron - two banks, Sun Niagara - four banks and IBM Power5 -
three banks). But in the other hand some other processors does not use
banking, like INTEL P4. This paper concerned on the effect of choosing a
certain number of cache-banks on the performance, power and area of the
cache. We used SimpleScalar with benchmarks spec95 to evaluate the
performance of the cache with different banks-number. Also we use CACTI
5.3 and eCACTI tools to evaluate the power and area parameters
corresponding to each banks number.